Circuito Integrato 74LS73 logica TTL doppio Flip Flop JK PDIP14
Art. #: 23074LS73
Disponibilità:
disponibile
| Quantità | Prezzo | IVA esclusa | IVA inclusa* |
|---|---|---|---|
| 1 | Listino | 3,28 € | 4,0016 € |
| 1 | Promo | 2,952 € | 3,60144 € |
| 5 | 10% | 2,6568 € | 3,241296 € |
| 25 | 20% | 2,3616 € | 2,881152 € |
* In fase di conferma d'ordine, i prezzi IVA inclusa verranno arrotondati alla seconda cifra decimale in accordo alla normativa vigente
The 74LS73 is a dual J-K Flip-flop with clear with LS technology and two independent J-K flip-flops with individual J-K, clock and direct clear inputs. It contains two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q\ output high.
- Genere di circuito integrato: flip-flop JK
- Numero canali: 2
- Montaggio: THT
- Corpo: DIP14
- Tensione di alimentazione: 4.75...5.25V DC
